Facet EDA Solutions
 
Verification Tools

    Active-HDL

    Riviera

    Riviera-IPT

    SimCluster

    CoVer


Design &
Verification IP

    PCI-Xactor

    PCI Express

    HyperTransport

    Advanced Switching

    Rapic IO

    Ethernet MAC

    SPI4

    Serial ATA

    SoC Building Blocks

 

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Facet EDA Solutions is the leading Electronic Design Automation (EDA) sales representative throughout New England and Upstate New York. For over ten years we have been helping engineers design and verify ASIC and FPGA designs using Verilog and VHDL.   Facet EDA offers tools, IP, and services from Aldec, GDA Technologies, and Avery Design.

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:Verification Tools

  • Active-HDL is the industry leading FPGA design and simulation solution which supports mixed VHDL, Verilog, SystemC™ and EDIF simulation from a single design entry and verification environment.

  • According to DeepChip "Aldec Active-HDL 6.3
    crushes Mentor ModelSim in ESNUG 445 #7"
  • Riviera is a high-performance ASIC and large FPGA simulation and verification solution.
  • Riviera-IPT is a unified hardware acceleration solution that maximizes simulation performance and accelerates ASIC and FPGA design verification by 10x - 50x over traditional methods.
  • SimCluster and SimCluster-DFT   unleash the power of parallel computing for RTL and gate-level simulation and delivers scalable simulation performance of five to seven times speedup, or more
  • CoVer is a hardware/software co-verification platform which enables hardware  and software developers to work in parallel on the same design.

Verification IP

  • PCI-Xactor is a set of tools for system designers to exercise and debug the design of component/systems based on all PCI standards

Design IP

  • PCI Express - End Point, Root, Switch Port
  • HyperTransport - Cave, Host, Tunnel
  • Advanced Switching
  • Rapid IO
  • Ethernet MAC
  • SPI4
  • Serial ATA - Transport Layer, Link Layer
  • SoC Building Blocks - follow the link to the left of the page for a complete listing